TMS320F28074是tms320f28系列DSP一系列的32位定点数字信号处理器,具有数字的信号处理能力、事件管理和嵌入式控制,它是最先进和最强大的DSP芯片,特别适用于监测和控制条件下,有大量的数据需要处理,例如:工业自动化控制,电力电子应用技术,智能仪表和电机,电机伺服控制等。目前,许多伺服控制仪器,UPS,变频器采用TI公司的tms320f28074。
	
		TMS320F28074特性:
	
		TMS320C28x 32-Bit CPU
	
		120 MHz
	
		IEEE 754 Single-Precision Floating-Point
	
		Trigonometric Math Unit (TMU)
	
		Programmable Control Law Accelerator
	
		[28075 Only]
	
		120 MHz
	
		IEEE 754 Single-Precision Floating-Point Executes Code Independently of Main CPU
	
		On-Chip Memory
	
		512KB of Flash (ECC-Protected)
	
		100KB of RAM (ECC or Parity)
	
		Dual-Zone Security Supporting Third-Party Development
	
		Clock and System Control
	
		Two Internal Zero-Pin 10-MHz Oscillators
	
		On-Chip Crystal Oscillator and External Clock Input
	
		Windowed Watchdog Timer Module
	
		Missing Clock Detection Circuitry
	
		1.2-V Core, 3.3-V I/O Design
	
		System Peripherals
	
		External Memory Interface (EMIF) With ASRAM and SDRAM Support
	
		6-Channel Direct Memory Access (DMA) Controller
	
		Up to 97 Individually Programmable, Multiplexed General-Purpose Input/Output (GPIO) Pins With Input Filtering
	
		HW Interrupt Controller
	
		Multiple Low-Power Mode Support With External Wakeup
	
		JTAG Emulation Connection
	
		Communications Peripherals
	
		USB 2.0 + PHY Port
	
		Two CAN-Bus Ports (Pin-Bootable)
	
		Three High-Speed (40-MHz) SPI Ports
	
		(Pin-Bootable)
	
		Two Multichannel Buffered Serial Ports
	
		Up to Four Serial Communications Interfaces (SCIs) (Pin-Bootable)
	
		Two I2C Interfaces (Pin-Bootable)
	
		Analog Subsystem
	
		Up to Three Analog-to-Digital Converters
	
		12-Bit Mode
	
		3.1 MSPS Each (up to 9.3-MSPS System)
	
		Single-Ended
	
		Up to 17 External Channels
	
		Single Sample-and-Hold (S/H) on Each ADC
	
		HW Integrated Post-Processing of ADC Conversions
	
		Saturating Offset Calibration
	
		Error From Setpoint Calculation
	
		High, Low, and Zero-Crossing Compare, With Interrupt Capability
	
		Trigger-to-Sample Delay Capture
	
		Eight Windowed Comparators With 12-Bit DAC References
	
		Three 12-Bit Buffered DAC Outputs
	
		Enhanced Control Peripherals
	
		Up to 24 PWM Channels With Enhanced Features
	
		Up to 16 High-Resolution Pulse Width Modulator (HRPWM) Channels
	
		High Resolution on Both A and B Channels of 8 PWM Modules
	
		Dead-Band Support (on Both Standard and High Resolution)
	
		Six Enhanced Capture (eCAP) Modules
	
		Up to Three Enhanced Quadrature Encoder Pulse (eQEP) Modules
	
		Up to 8 Sigma-Delta Filter Module (SDFM) Input Channels, 2 Parallel Filters per Channel
	
		Standard SDFM Data Filtering
	
		Comparator Filter for Fast Action for Out of Range
	
		Package Options:
	
		176-Pin PowerPAD Thermally Enhanced Low-Profile Quad Flatpack (HLQFP)
	
		[PTP Suffix]
	
		100-Pin PowerPAD Thermally Enhanced Thin Quad Flatpack (HTQFP) [PZP Suffix]
	
		Temperature Options:
	
		T: –40oC to 105oC Junction
	
		S: –40oC to 125oC Junction
	
		Q: –40oC to 125oC Free-Air
	
		(Q100 Qualification for Automotive Applications)
	
		 
	
		
			 
		
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